8bitlenser/lenser/vic20/viewer/viewer.s
2026-07-03 19:35:35 -07:00

95 lines
2.7 KiB
ArmAsm

; VIC-20 image viewer (autostart 8K cartridge at $A000).
;
; The KERNAL does NOT initialise the VIC before launching an autostart cart, so
; this code programs every VIC register itself, copies the character set, screen
; and colour data from the cartridge ROM into RAM, then loops forever showing the
; picture.
;
; Layout in unexpanded RAM -- char set $1400-$1BFF (256 chars), screen $1E00,
; colour RAM $9600 (fixed). $9005 = $FD selects screen $1E00 + char base $1400.
;
; The build (assemble.py) appends the data blocks at the fixed ROM addresses
; CHARSRC / SCRSRC / COLSRC and fills in the BG / BORDER / AUX colour defines.
.word cold ; $A000 cold-start vector
.word cold ; $A002 warm-start vector
.byte $41,$30,$C3,$C2,$CD ; "A0CBM" autostart signature
; zero-page scratch (KERNAL-safe temporaries)
src = $fb ; $fb/$fc copy source pointer
dst = $fd ; $fd/$fe copy destination pointer
cold:
sei
cld
ldx #$ff
txs
; --- copy the 256-char set (2048 bytes = 8 pages) ROM -> $1400 ---
lda #<CHARSRC
sta src
lda #>CHARSRC
sta src+1
lda #$00
sta dst
lda #$14
sta dst+1
ldx #8 ; pages to copy
jsr copypages
; --- copy the screen (506 bytes -> 2 pages) ROM -> $1E00 ---
lda #<SCRSRC
sta src
lda #>SCRSRC
sta src+1
lda #$00
sta dst
lda #$1e
sta dst+1
ldx #2
jsr copypages
; --- copy colour RAM (506 bytes -> 2 pages) ROM -> $9600 ---
lda #<COLSRC
sta src
lda #>COLSRC
sta src+1
lda #$00
sta dst
lda #$96
sta dst+1
ldx #2
jsr copypages
; --- program the VIC ---
lda #$05
sta $9000 ; horizontal origin
lda #$19
sta $9001 ; vertical origin
lda #$96
sta $9002 ; 22 columns + screen address bit 9
lda #$2e
sta $9003 ; 23 rows, 8x8 chars
lda #$fd
sta $9005 ; screen $1E00 + char base $1400
lda #(AUX<<4)
sta $900e ; auxiliary colour (bits 4-7), volume 0
lda #((BG<<4)|$08|BORDER)
sta $900f ; bg (bits 4-7) | normal mode (bit3) | border (0-2)
loop:
jmp loop ; hold the picture forever
; copy X pages of 256 bytes from (src) to (dst)
copypages:
ldy #$00
cp1:
lda (src),y
sta (dst),y
iny
bne cp1
inc src+1
inc dst+1
dex
bne cp1
rts