; lenser -- Apple //e Double Hi-Res boot loader + viewer (self-contained) ; ; Loads 16K to main $2000-$5FFF with ordinary reads (main half at $2000, aux half ; at $4000), then block-copies $4000-$5FFF into auxiliary $2000-$3FFF (RAMWRT on ; only for that clean copy, never during the boot-ROM reads), then turns on DHGR. ; ROM read at $C65C reads sector $3D into page $27 and re-enters $0801. ; ; assembled by apple/viewer/assemble.py via xa * = $0800 .byte $01 entry: ; $0801, re-entered after each ROM read lda dpage cmp #$60 ; loaded $2000-$5FFF (64 pages)? bcs done lda psec cmp #$10 bcc readit jsr seeknext lda #$00 sta psec readit: lda psec sta $3d ; desired sector lda curtrk sta $41 ; desired track (the ROM read verifies BOTH) lda #$00 sta $26 lda dpage sta $27 inc psec inc dpage ldx $2b jmp $c65c done: ; copy main $4000-$5FFF -> aux $2000-$3FFF lda #$00 sta $06 lda #$40 sta $07 ; src = $4000 lda #$00 sta $08 lda #$20 sta $09 ; dst = $2000 sta $c005 ; RAMWRT on (writes go to aux) ldx #$20 ; 32 pages cpl: ldy #$00 cp1: lda ($06),y sta ($08),y iny bne cp1 inc $07 inc $09 dex bne cpl sta $c004 ; RAMWRT off ; turn on Double Hi-Res lda $c050 ; graphics lda $c052 ; full screen lda $c054 ; page 1 lda $c057 ; hi-res sta $c00d ; SET80VID (write-triggered switch -- must STA) sta $c05e ; SETDHIRES (write-triggered) #include "awyt.i" ; advance the head one track (two half-steps) with the standard phase-overlap ; seek. energize the NEXT phase while the current one is still on (this pulls ; the head smoothly), then release the old phase, using on/off settle delays ; from an acceleration table indexed by step number ($0a). the final phase is ; released before reading. seeknext: inc curtrk ; now on the next track lda #$00 sta $0a ; step index for the timing table jsr onestep jsr onestep lda halftrk ; release final phase before the read and #$03 asl ora $2b tax lda $c080,x rts onestep: lda halftrk ; energize NEXT phase (halftrk+1), old still on clc adc #$01 and #$03 asl ora $2b tax lda $c081,x ldx $0a lda ontable,x jsr wait lda halftrk ; release OLD phase (halftrk) and #$03 asl ora $2b tax lda $c080,x ldx $0a lda offtable,x jsr wait inc halftrk inc $0a rts ; Apple seek timing tables (head accelerates over a move, slow first step). ontable: .byte $13,$0a,$08,$06,$05,$04,$04,$03 offtable: .byte $46,$1a,$10,$0c,$0a,$09,$08,$08 wait: ; delay loop ~ proportional to A tay w1: ldx #$00 w2: dex bne w2 dey bne w1 rts psec: .byte $01 dpage: .byte $20 halftrk: .byte $00 curtrk: .byte $00