First public commit.
This commit is contained in:
parent
2a48f52979
commit
4bac9d83ed
288 changed files with 18417 additions and 1076 deletions
0
lenser/iigs/viewer/__init__.py
Normal file
0
lenser/iigs/viewer/__init__.py
Normal file
82
lenser/iigs/viewer/assemble.py
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82
lenser/iigs/viewer/assemble.py
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@ -0,0 +1,82 @@
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"""Assemble the IIGS SHR boot/viewer with `xa` (origin $0800, raw bytes)."""
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from __future__ import annotations
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import os
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import shutil
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import subprocess
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import tempfile
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VIEWER_DIR = os.path.dirname(os.path.abspath(__file__))
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class AssemblerError(RuntimeError):
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pass
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def have_xa() -> bool:
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return shutil.which("xa") is not None
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def assemble_boot() -> bytes:
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"""Return the boot0 sector (<=256 bytes) that loads the SHR block + shows it."""
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if not have_xa():
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raise AssemblerError("The 'xa' assembler was not found on PATH.")
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with tempfile.TemporaryDirectory() as td:
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out = os.path.join(td, "v.bin")
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proc = subprocess.run(["xa", "-w", "-o", out, "iigs.s"],
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capture_output=True, text=True, cwd=VIEWER_DIR)
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if proc.returncode != 0:
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raise AssemblerError(f"xa failed:\n{proc.stdout}{proc.stderr}")
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with open(out, "rb") as f:
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boot = f.read()
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if len(boot) > 256:
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raise AssemblerError(f"boot sector is {len(boot)} bytes (>256)")
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return boot
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SS_WAITMODE = {"key": 1, "seconds": 2, "both": 3}
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def _xa_wrapper(wrapper: str, what: str) -> bytes:
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if not have_xa():
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raise AssemblerError("The 'xa' assembler was not found on PATH.")
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with tempfile.TemporaryDirectory() as td:
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out = os.path.join(td, "v.bin")
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fd, wrap = tempfile.mkstemp(suffix=".s", prefix="_wrap_", dir=VIEWER_DIR)
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try:
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with os.fdopen(fd, "w") as f:
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f.write(wrapper)
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proc = subprocess.run(["xa", "-w", "-o", out, os.path.basename(wrap)],
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capture_output=True, text=True, cwd=VIEWER_DIR)
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if proc.returncode != 0:
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raise AssemblerError(f"xa failed for {what}:\n{proc.stdout}{proc.stderr}")
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with open(out, "rb") as f:
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return f.read()
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finally:
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os.unlink(wrap)
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def build_slideshow(n_images: int, advance: str = "both", seconds: int = 10,
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loop: bool = True, video: str = "ntsc"):
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"""Assemble the two-stage IIGS SHR slideshow.
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Returns (boot_sector<=256B, stage2_bytes, stage2_pages). The boot reads
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stage2 (stage2_pages sectors) into $0900, then the images into bank-0 $2000
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and banks them; stage2 cycles them onto the SHR screen.
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"""
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speed = 8 if video != "pal" else 7 # ~1s delay outer count (fast IIGS)
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stage2 = _xa_wrapper(
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f"#define WAITMODE {SS_WAITMODE[advance]}\n"
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f"#define WAITSECS {max(0, min(255, int(seconds)))}\n"
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f"#define SPEED {speed}\n"
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f"#define NIMAGES {n_images}\n"
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f"#define LOOPFLAG {1 if loop else 0}\n"
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'#include "slideshow_stage2.s"\n', "iigs stage2")
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s2_pages = max(1, (len(stage2) + 255) // 256)
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boot = _xa_wrapper(
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f"#define NIMAGES {n_images}\n"
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f"#define S2END ${0x09 + s2_pages:02X}\n"
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'#include "slideshow_boot.s"\n', "iigs boot")
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if len(boot) > 256:
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raise AssemblerError(f"IIGS slideshow boot is {len(boot)} bytes (>256)")
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return boot, stage2, s2_pages
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116
lenser/iigs/viewer/iigs.s
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116
lenser/iigs/viewer/iigs.s
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@ -0,0 +1,116 @@
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; lenser -- Apple IIGS Super Hi-Res boot loader + viewer (8-bit, no GS/OS).
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;
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; The Disk II boot ROM (slot 6) loads track 0 sector 0 to $0800 and JMPs $0801.
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; This re-entrant loader reads the 32K SHR block (pixels $2000-$9CFF, SCBs
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; $9D00, palettes $9E00) into main RAM $2000-$9FFF, then copies it to AUX RAM
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; with SHR shadowing enabled -- so the writes mirror into bank $E1 (the SHR
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; screen) -- and turns SHR on (NEWVIDEO bit 7). All 8-bit, no 65C816 needed.
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* = $0800
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.byte $01 ; ROM scratch (boot sector byte 0)
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entry: ; $0801, re-entered after every ROM read
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lda dpage
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cmp #$a0
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bcs done ; loaded $2000..$9FFF -> show it
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lda psec
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cmp #$10
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bcc readit ; sectors left on this track
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jsr seeknext ; finished a track -> step to the next
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lda #$00
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sta psec
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readit:
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lda psec
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sta $3d ; desired sector
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lda curtrk
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sta $41 ; desired track
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lda #$00
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sta $26 ; buffer lo
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lda dpage
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sta $27 ; buffer hi
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inc psec
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inc dpage
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ldx $2b ; slot*16 (set by boot ROM)
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jmp $c65c ; slot 6 ROM read; reads sector then JMP $0801
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done:
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; Turn on Super Hi-Res (bit 7) AND linearize (bit 6) FIRST. With these
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; set, CPU writes to bank $E1 $2000-$9FFF are de-interleaved by hardware
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; into the megaII layout the video reads -- so we can copy our linear SHR
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; block straight in and it displays correctly.
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lda $c029
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ora #$c0
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sta $c029
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; copy 32K from bank $00 $2000 -> bank $E1 $2000 (65C816 block move)
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clc
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xce ; -> native mode
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rep #$30 ; 16-bit A/X/Y
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.al
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.xl
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lda #$7fff ; count-1 (32768 bytes)
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ldx #$2000 ; source offset
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ldy #$2000 ; dest offset
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.byte $54, $e1, $00 ; MVN src bank $00 -> dest bank $E1
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sep #$30 ; 8-bit
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.as
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.xs
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sec
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xce ; -> emulation mode
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lda $c034 ; border colour is the low nibble of $C034
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and #$f0
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sta $c034 ; black border
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hang:
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jmp hang
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; advance the head one track (two half-steps), phase-overlap step.
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seeknext:
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inc curtrk
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lda #$00
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sta $0a
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jsr onestep
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jsr onestep
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lda halftrk
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and #$03
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asl
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ora $2b
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tax
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lda $c080,x
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rts
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onestep:
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lda halftrk
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clc
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adc #$01
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and #$03
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asl
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ora $2b
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tax
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lda $c081,x
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ldx $0a
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lda ontable,x
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jsr wait
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lda halftrk
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and #$03
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asl
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ora $2b
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tax
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lda $c080,x
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ldx $0a
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lda offtable,x
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jsr wait
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inc halftrk
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inc $0a
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rts
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ontable: .byte $13,$0a,$08,$06
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offtable: .byte $46,$1a,$10,$0c
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wait:
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tay
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w1: ldx #$00
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w2: dex
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bne w2
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dey
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bne w1
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rts
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psec: .byte $01
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dpage: .byte $20
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halftrk: .byte $00
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curtrk: .byte $00
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115
lenser/iigs/viewer/slideshow_boot.s
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115
lenser/iigs/viewer/slideshow_boot.s
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; lenser -- Apple IIGS SHR slideshow, stage 1 boot sector (<=256 bytes).
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;
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; The Disk II boot ROM loads track 0 sector 0 to $0800 and JMPs $0801; every ROM
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; sector read JMPs back to $0801, so this is the master read driver. It first
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; reads stage 2 into $0900 (S2END-$09 sectors), then reads each 32K SHR image
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; into bank-0 $2000-$9FFF and calls stage 2 (stash, $0900) to bank it; after the
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; last image it JMPs the stage-2 cycle viewer ($0903).
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;
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; #defines from the wrapper -- NIMAGES, S2END (one past the last stage-2 page).
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* = $0800
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.byte $01 ; ROM scratch (boot sector byte 0)
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entry: ; $0801, re-entered after every ROM read
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lda dpage
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cmp endpg
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bcc rdcont ; not at the current region's end yet
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lda phase
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bne imgdone
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; stage 2 finished loading -> start reading images into $2000
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inc phase
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lda #$20
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sta dpage
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lda #$a0
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sta endpg
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bne rdcont ; always (endpg = $a0)
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imgdone:
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jsr $0900 ; stash bank0 $2000 -> next bank
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inc imgcnt
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lda imgcnt
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cmp #NIMAGES
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bcs allloaded
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lda #$20
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sta dpage ; reset for the next image
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bne rdcont ; always
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allloaded:
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jmp $0903 ; stage-2 cycle viewer (never returns)
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rdcont:
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lda psec
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cmp #$10
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bcc readit
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jsr seeknext
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lda #$00
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sta psec
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readit:
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lda psec
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sta $3d
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lda curtrk
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sta $41
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lda #$00
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sta $26
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lda dpage
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sta $27
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inc psec
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inc dpage
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ldx $2b
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jmp $c65c ; slot-6 ROM read; reads a sector then JMP $0801
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; advance the head one track (two half-steps), phase-overlap step (from iigs.s)
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seeknext:
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inc curtrk
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lda #$00
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sta $0a
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jsr onestep
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jsr onestep
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lda halftrk
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and #$03
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asl
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ora $2b
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tax
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lda $c080,x
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rts
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onestep:
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lda halftrk
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clc
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adc #$01
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and #$03
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asl
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ora $2b
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tax
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lda $c081,x
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ldx $0a
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lda ontable,x
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jsr wait
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lda halftrk
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and #$03
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asl
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ora $2b
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tax
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lda $c080,x
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ldx $0a
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lda offtable,x
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jsr wait
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inc halftrk
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inc $0a
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rts
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ontable: .byte $13,$0a,$08,$06
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offtable: .byte $46,$1a,$10,$0c
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wait:
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tay
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w1:
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ldx #$00
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w2:
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dex
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bne w2
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dey
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bne w1
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rts
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phase: .byte 0 ; 0 = loading stage 2, 1 = loading images
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endpg: .byte S2END ; stage-2 ends one past this page
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imgcnt: .byte 0
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psec: .byte $01 ; next physical sector (track 0 starts at 1)
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dpage: .byte $09 ; stage 2 loads from $0900
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halftrk: .byte $00
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curtrk: .byte $00
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147
lenser/iigs/viewer/slideshow_stage2.s
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147
lenser/iigs/viewer/slideshow_stage2.s
Normal file
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@ -0,0 +1,147 @@
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; lenser -- Apple IIGS SHR slideshow, stage 2 (loaded at $0900 by the boot).
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;
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; The boot reads each 32K SHR image into bank-0 $2000-$9FFF and calls stash to
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; block-move it up into a free RAM bank (image i -> bank 1+i, offset $2000).
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; Once all images are stashed the boot JMPs cycle, which block-moves each banked
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; image into the SHR screen (bank $E1 $2000) in turn, waiting (key/seconds/both)
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; between slides. Self-modifying MVN bank bytes select the bank per image.
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;
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; #defines from the wrapper -- WAITMODE 1 key/2 seconds/3 both, WAITSECS, SPEED
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; (delay outer count ~1s at the IIGS clock), NIMAGES, LOOPFLAG.
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* = $0900
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jmp stash ; $0900 entry (called per loaded image)
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jmp cycle ; $0903 entry (called once, all images loaded)
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; ---- MVN bank0 $2000 -> curbank $2000 (32K), then advance curbank ----
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stash:
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clc
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xce
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rep #$30
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.al
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.xl
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lda #$7fff
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ldx #$2000
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ldy #$2000
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.byte $54 ; MVN dest, src
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mvndst: .byte $01 ; dest bank (patched each call)
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.byte $00 ; src bank 0
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.byte $4b ; phk
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.byte $ab ; plb -- restore DBR = 0 (MVN left it = dest bank)
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sep #$30
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.as
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.xs
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sec
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xce
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inc mvndst ; next image -> next bank
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rts
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; ---- show each banked image on the SHR screen, forever ----
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cycle:
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lda $c029
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ora #$c0
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sta $c029 ; SHR on + linearise
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lda $c034
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and #$f0
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sta $c034 ; black border
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lda #$01
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sta mvnsrc
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lda #$00
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sta cyci
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cloop:
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clc
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xce
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rep #$30
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.al
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.xl
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lda #$7fff
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ldx #$2000
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ldy #$2000
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.byte $54, $e1 ; MVN dest $E1, src ...
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mvnsrc: .byte $01 ; src bank (patched per slide)
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.byte $4b ; phk
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.byte $ab ; plb -- restore DBR = 0
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sep #$30
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.as
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.xs
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sec
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xce
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jsr sswait
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inc cyci
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lda cyci
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cmp #NIMAGES
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bcc cnext
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#if LOOPFLAG == 1
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lda #$01
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sta mvnsrc
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lda #$00
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sta cyci
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jmp cloop
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#else
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jmp $e000 ; (no loop) cold start to firmware
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#endif
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cnext:
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inc mvnsrc
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jmp cloop
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; ---- wait (returns); $C000 bit7 = key, delay loop for the timer ----
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sswait:
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bit $c010
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#if WAITMODE == 1
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swk:
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lda $c000
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bpl swk
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bit $c010
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rts
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#endif
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#if WAITMODE == 2
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lda #WAITSECS
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sta wsec
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wso:
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lda #SPEED
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sta wmid
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wsm:
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ldx #$00
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wsx:
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ldy #$00
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wsy:
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dey
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bne wsy
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dex
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bne wsx
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dec wmid
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bne wsm
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dec wsec
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bne wso
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rts
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#endif
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#if WAITMODE == 3
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lda #WAITSECS
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sta wsec
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wbo:
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lda #SPEED
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sta wmid
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wbm:
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lda $c000
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bmi wbk ; a key ends the slide
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ldx #$00
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wbx:
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ldy #$00
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wby:
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dey
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bne wby
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dex
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bne wbx
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dec wmid
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bne wbm
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dec wsec
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bne wbo
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rts
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wbk:
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bit $c010
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rts
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#endif
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wsec: .byte 0
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wmid: .byte 0
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cyci: .byte 0
|
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